February 28, 2008
Much of firmware development focuses on interfacing with registers. Documentation plays a key role in this effort since engineers must refer to it constantly to look up register and bit details. In particular, engineers need to generate or decode hex numbers, where the value of each bit must be clearly […]
January 31, 2008
A client recently asked me to write down some suggestions of best practices and process improvements for his company. I noted several suggestions, sorted them into four categories, and started writing them up. Partway through this process, I noticed that two of my recommendations seemed to contradict each other. On […]
December 31, 2007
In last month’s issue I discussed how DMA controllers can be used to troubleshoot data flow problems in and out of a block. Since DMA controllers are instantiated in many blocks, the DMA controller is a good place to put additional debugging tools. One such debugging tool is a CRC […]
November 30, 2007
Many blocks within chips process data read from or written to memory using direct memory access (DMA) controllers. Firmware initiates the data processing by setting up the blocks and DMA controllers. When problems occur, the first task is to figure out if the problem is in the block, in the […]
October 31, 2007
Porting firmware code to a new hardware platform often requires making changes that break support for old platforms. Code maintenance, defect fixes, and new features become cumbersome and error prone when such changes must be made across multiple versions of the same code. In last month’s issue, I talked about […]
August 31, 2007
The constant drive to announce improved products with new features can force frequent changes in both hardware and firmware. New chips and firmware may be produced that are mostly the same as their predecessors but with a few new features or tweaks. Ideally, any version of firmware will work with […]
July 31, 2007
In last month’s newsletter I talked about analyzing the size of buffers. Now I will discuss the importance of proper management support for buffers – support in terms of status, interrupts, and errors. For example, when should an interrupt be generated on the receiving buffer? When one byte arrives? When […]
June 30, 2007
One of the more challenging aspects of an embedded systems design is to maximize the time hardware and firmware can work independently while minimizing the time they have to wait for each other. The proper use and sizing of buffers can help balance the load between hardware and firmware. An […]
May 31, 2007
A printer ASIC was designed to be just a PCI Express endpoint so some of the configuration registers were hard-coded as such and it was used in a printer model. Sometime later, for a new printer model, the engineers wanted to use the ASIC as a root complex to bridge […]
The Impacts of Debugging Facilities and Platform-Specific Code